Source: Unsplash

At Computex 2021, Lisa Su, AMD’s CEO, revealed that it had been jointly developing a processor with TSMC’s 3DFabric technologies. It marks the first time that AMD adopts 3D chiplet technology to its products. Last year AMD already announced its exploration of advanced packaging technology, soon followed by TSMC’s announcement of its 3DFabric progress. According to TSMC, its 3DFabric consists of both frontend and backend technologies. 

AMD’s Computex presentation showed a stacked cache integrated with a standard processor: a Ryzen 5000 dual-chiplet processor with a 64 MB SPRAM atop one of the chiplet. Originally with 32 MB of L3 cache, now the Ryzen 5000 chiplet has 96 MB of L3 cache in total. In the final product, each chiplet will have one 96 MB cache stacked atop. 

Consequently, AMD claimed that the final product would deliver over 200 times the interconnect density of regular 2D packaging and more than 15 times the density of conventional 3D packaging. 

Catching up, aided by TSMC

The announcement signals a tighter partnership between the chip designer and the chip manufacturer. TSMC’s advanced 7nm process was crucial to AMD’s overtaking of Intel when AMD released its Zen 2-based Ryzen 3000 processor in 2019, when Intel was still struggling with its 10nm and 7nm processes. Intel’s delay allowed AMD, its main rival in desktop CPU, to swiftly catch up. 

In January this year, AMD even briefly overtook Intel with a 50.8% share in the Windows desktop CPU market. In Q1 of 2021, Intel has a 60.6% market share in computer CPU, while AMD has 39.4%. 

AMD will continue to use TSMC’s 7nm process until the release of its Zen 4 core, which will use the 5nm process. In fact, AMD has come to be TSMC’s largest client in terms of the 7nm process, with Apple moving down further into the 5nm node. The Ryzen 5000 processor presented yesterday was based on the Zen 3 core. 

AMD became the first CPU designer using 3D packaging and partly owes its recent success to this decision. In fact, TSMC cooperated with AMD and Google for its frontend 3D packaging technique known as SOIC (System on Integrated Chips). It later became a key component of TSMC’s 3DFabric. 

Intel, on the other hand, stuck with monolithic design and was at first critical of AMD’s adoption of 3D packaging, especially when AMD used 3D packaging for its server processor Epyc. However, Intel later took a U-turn and introduced its own 3D packaging technology known as Foveros in 2019.  

 

 

Source: TechNews, UDN